GaN offers several superior characteristics over Si as a semiconductor material for fabricating devices, such as lower threshold voltage, lower on-state resistance (Rdson), lower parasitic capacitance, lower gate resistance, and better FOM (figure of merit), resulting in tremendous performance and size advantages over Si. With such advantages as apparent motivating factors, ongoing extensive efforts have been made in the semiconductor industry to improve the crystal quality of GaN. For example, GaN typically has a high defect density attributable to slip lines resulting from lattice mismatch between the growth substrate and the GaN epitaxy e.g. −17% in the case of GaN on Si(111). Reducing defect density caused by slip lines yields an improvement of device performance in many cases, e.g. power devices such as GaN-based HEMTs (high electron mobility transistors). In addition to the GaN epitaxy itself, the underlying buffer layer(s) should also have good crystal quality. Acceptable GaN crystal quality has been realized to date by using Si growth substrates which are relatively inexpensive. GaN crystal quality improves by increasing the thickness of the deposited GaN layer.
However, the maximum thickness of GaN grown on Si is limited by the difference in coefficient of thermal expansion (CTE) between the two materials. The CTE of GaN ranges from 5.6*10^-6/K to 6.2*10^-6/K depending on the source. Si has a CTE of 2.6*10^-6/K. Deposition of GaN is typically done at temperatures around 1000° C. (e.g. 1000-1200° C. for MOCVD—metal organic chemical vapor deposition). The deposited GaN layer cracks during subsequent cooling if made too thick due to the severe tensile stress induced by the smaller CTE of Si. The maximum thickness of GaN deposited on Si is therefore in the range of 6-8 μm. If thicker GaN layers are needed, more expensive substrates are conventionally used such as SiC, sapphire or very rare (pure) GaN substrates.